A Nanosecond Pulse Generator based on the Reconfigurable Phase-Locked Loop (PLL) Module in Field Programmable Gate Arrays (FPGAs)

Members

Zhang Xing Jian A0226453H, Zhang Jian Ran A0226340R, Chua Rui Ming A0155387U

Motivation

Field Programmable Gate Arrays (FPGAs) offer both the advantage of Programmable Logic Devices (PLDs) and Application Specific Integrated Circuits (ASICs) because it possesses the functional flexibility without the simplicity of the former and the functional complexity without the inflexibility of the latter¹ (Maxfield, 2008). Furthermore, they are cheap and easy to implement which enables small groups to meet their hardware and software needs² (Maxfield, 2008). As a result, FPGAs represent a useful option to the production of narrow pulses which finds its role in a myriad of scientific applications³ (Zhu & Wang, 2015). In our context, the generation of narrow pulses is of particular interest in the field of integrated photonics, for example, in the carving of pump light into short pulses for Spontaneous Four-Wave Mixing (SFWM) in silicon microring resonators⁴ (Ma, 2020). The use of FPGAs to produce narrow pulses provides us with a compact and adjustable pulse generator compatible with integrated photonics technology.

FPGA Specifications

Our FPGA is the "DE0-Nano Development and Education Board" from Terasic (vendor). The FPGA utilises Intel Altera's Cyclone IV family, specifically, the Cyclone IV E variant (Terasic Technologies, n.d.). The architecture consists of up to 115K vertically arranged Logic Elements, 4 Mbits of embedded memory arranged as 9-Kbit (M9K) blocks, and 266 18 x 18 embedded multipliers (Intel, n.d.).

References

Intel. (n.d.). Cyclone® IV Fpgas devices - Intel® FPGA. Retrieved March 23, 2021, from https://www.intel.sg/content/www/xa/en/products/programmable/fpga/cyclone-iv.html

Intel. (2018, December 20). Altera phase-locked Loop (ALTERA PLL) ip core user guide. Retrieved March 23, 2021, from https://www.intel.com/content/www/us/en/programmable/documentation/mcn1401782837027.html

Intel. (2020). Intel® Quartus® Prime Software Suite. The Intuitive High-Performance Design Environment. Retrieved March 22, 2021, from https://www.intel.com/content/www/us/en/software/programmable/quartus-prime/overview.html

Ma, C. (2020). High-Quality Photon Pair Generation in Silicon Photonic Microring and Its Applications. UC San Diego. ProQuest ID: Ma_ucsd_0033D_19192. Merritt ID: ark:/13030/m5sf83ns. Retrieved from https://escholarship.org/uc/item/7ws930nj

Maxfield, C. (2008). Fpgas: Instant access. In FPGAs: Instant access (1st ed., pp. 1-12). Burlington, MA: Newnes/Elsevier.

Terasic Technologies. (n.d.). All FPGA boards - Cyclone IV - DE0-Nano development and Education Board. Retrieved March 23, 2021, from https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=139&No=593&PartNo=3#section

Zhu, Y., & Wang, L. (2015). Design and implementation of nanosecond Pulse generator based ON RECONFIGURATION PLL in FPGA. Proceedings of the 2015 International Conference on Electronic Science and Automation Control. doi:10.2991/esac-15.2015.78